1. Field of the Invention
The invention relates to a chip package, and in particular relates to a chip package formed by a wafer level packaging process.
2. Description of the Related Art
A fabrication process of chip packages is one important step of forming electronic products. A chip package not only provides protection for the chips from environmental contaminants, but also provides a connection interface for chips packaged therein.
Because the size of the chip is shrinking and the number of pads is increasing, it has become more difficult to form wires which are electrically connected to the pads in the chip package. Also, the accuracy of the dicing process of chips affects the reliability and performance of formed chip packages. Thus, it is desired to have an improved chip packaging technique.